Syllabus
Lecture Slides
VHDL Shift Register Model
Two Page VHDL Reference
Five Page VHDL Reference
Seventeen Page VHDL Reference
Book VHDL Figures
Homework Assignments
Laboratory Reference
Altera's MAX+plus II and the Altera UP 1 Educational Board
Altera University Program Design Laboratory Package User's Guide
Laboratory Assignments
Due 2/11/05: Lab #1
Due 2/25/05: Lab #2
Due 3/11/05: Lab #3
Due 4/15/05: Graduate Project
Homework Solutions
Homework #1
Homework #2
Homework #3
Homework #4
Homework #5
Homework #6
Homework #7
Test and Solutions
Midterm Exam
Midterm Exam Solution
Announcements
Undergraduate Grades 4/29/05
Graduate Grades 4/29/05
Undergraduate Grades 5/2/05
Graduate Grades 5/2/05
Archived Information from Spring 2004
grubbs@eng.uah.edu