--	The following funtion produces the PLA output according to the PLA
--		specification (PLAmtrx) and the PLA inputs.
--	The steps in this function are as follows:
--	1) Start at the first row of the PLAmtrx
--	2) Determine whether the given inputs match the PLA inputs in the 
--			current row
--	3) If the inputs match current PLA row, then OR the current outputs with
--		the PLA outputs
--	4) Repeat steps (2) and (3) for all rows in the PLA matrix

type PLAmtrx is array (integer range <>, integer range <>) of std_logic;
function PLAout (PLA: PLAmtrx; Input: std_logic_vector) 
		return std_logic_vector is
	alias In1: std_logic_vector(Input'length-1 downto 0) is Input;
	variable match: std_logic;
	variable PLAcol, step: integer;
	variable PLArow: std_logic_vector(PLA'length(2)-1 downto 0)
	variable PLAinp: std_logic_vector(Input'length-1 downto 0);	
	variable Output: 
		std_logic_vector((PLA'length(2)-Input'length-1) downto 0);
begin
	Output := (others=>'0');	-- Initialize output to all zeros
	if PLA'left(2) > PLA'right(2) then step := -1; else step := 1;
	end if;
		LP1:  for row in PLA'range loop	--Scan each row of PLA
		match := '1';				-- Assume match for now
		PLAcol := PLA'left(2);

		LP2: for col in PLArow'range loop	-- Copy row of PLA table
			PLArow(col) := PLA(row,PLAcol);	
			PLAcol := PLAcol + step;
		end loop LP2;
		PLAinp := PLArow(PLArow'high downto PLArow'high-Input'length+1);
		
		LP3:  for col in In1'range loop	-- Scan each input column
				if IN1(col) /= PLAinp(col) and PLAinp(col) /= 'X' then
					match := '0'; exit;		-- mismatched row
				end if;
		end loop LP3;

		if (match = '1') then
			Output := Output or PLArow(Output'range);
		end if;
	end loop LP1;
	return Output;
end PLAout;