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CPE 626 -
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Course Information
Term and Course Credit: Fall Semester 2004, 3 Credit Hours
Time and Place: Lecture: MW 5:30–6:50 PM, EB
229
Instructor: Dr.
Aleksandar Milenkovic
Email: milenka@ece.uah.edu
Phone: (256) 824 6830
Office: 217-L
Office Hours: MW 7:00-8:00 PM or by appointment
Class Web page: http://www.ece.uah.edu/~milenka/cpe626-04F
Description:
In the future we will need more customized, application-specific solutions,
which can provide the performance needed at a lower cost than general-purpose
architectures. Because cost and time-to-market constraints are very important
to such systems, architecture should permit automatic design, including
high-level architectural design. In this course we will present a new design
methodology based on using modern hardware description languages such as VHDL,
Verilog, and SystemC. The course addresses algorithm, architecture, and
implementation aspects of common building blocks (arithmetic processing
elements, filters, processor cores, etc).
Recommended References:
� J. Rabaey, A. Chandarakasan, B. Nikolic, Digital Integrated Circuits: A Design Perspective Prentice Hall, 2/e, ISBN 0-13-090996-3.
� Michael John Sebastian Smith, Application-Specific Integrated Circuits, Addison-Wesley, 1997. ISBN: 0201500221.http://www-ee.eng.hawaii.edu/~msmith/ASICs/HTML/ASICs.htm
� Peter J. Ashenden, The Designer's Guide to VHDL (2nd edition), Morgan-Kaufmann Publishers, 2002 (ISBN: 1-55860-674-2).
� K. C. Chang, Digital Systems Design with VHDL and Synthesis - An Integrated Approach, IEEE Computer Society, 1999.
Prerequisite: CPE 526
Academic Misconduct: All students will be trusted to pursue their academic careers with honesty and integrity. Academic dishonesty includes, but not limited to, cheating on a test or other course work, plagiarism, unauthorized collaboration with other persons. Academic misconduct of any type will not be tolerated. Students are expected to conform to the UAH policies concerning academic misconduct as outlined in Article III (starting on page 91) of the 2000-2001 UAH Student Handbook.
Exam Dates:
Midterm Exam - October 20 (Wednesday), 2004
Grading Policy:
Final course grades will be determined in the manner outlined below. Grades will be determined on a
70-80-90 straight scale. On occasion I may use a slightly lower scale, but I
will never raise the requirements.
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# |
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% of Final Grade |
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1 |
Homeworks
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20% |
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2 |
Midterm |
25% |
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3 |
35% |
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|
4 |
Essay |
15% |
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5 |
Class participation |
5% |
Topics:
� Languages for VLSI synthesis: VHDL, Verilog, SystemC.
� FPGA hardware structures.
� Design and analysis of algorithm-specific VLSI processor architectures. Topics include the implementation of pipelined and systolic processor structure.
� Techniques for mapping numerical algorithms onto custom processor arrays, including Application Specific Instruction Processors (ASIPs).
� Prototyping using Xilinx ISE and Xilinx FPGAs.
� High-level DSP algorithm simulation and code generation.
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Lecture notes
Lecture notes will be available in PPT and PDF format.
The notes may be subject to slightly change.
� W1
� Aug 30, 2004 (first class): l01_intro.pdf (3/1), Readings: 2001 Technology Roadmap for Semiconductors, Syllabus
� Sep 1, 2004: l02_mu0.pdf (6/1), l02_vhdl.pdf (6/1), Tutorial: ModelSim6.8se, Getting Started with ModelSim (adapted CPE422 tutorial)
� W2
� Sep 6, 2004: No Classes
� Sep 8, 2004: l03_vhdl.pdf(6/1), Tutorial: Xilinx ISE Quick Start Tutorial, Xilinx ISE 6 In-depth Tutorial
� W3
� Sep 13, 2004: l04_vhdl.pdf(6/1), Tutorial: Xilinx System Generator v6.2 User Guide
� Sep 15, 2004 See above.
� W4
� Sep 20, 2004: l06_vhdl_syn.pdf (3/1), Synthesis and Verification Design Guide
� Sep 22, 2004: l07_vhdl_syn.pdf (3/1), Readings: xapp467
� W5
� Sep 27, 2004: l08_power.pdf(3/1)
� Sep 29, 2004: l09_fpgastructures.pdf(3/1)
� W6
� Oct 4, 2004: l10_fpgastructures.pdf(3/1)
� Oct 6, 2004 l11_systemc.pdf(3/1), Readings: Razor
� W7
� Oct 11, 2004: SystemC (Getting Started) /secure
�
Oct 13, 2004: SystemC (Data Types, Modeling of
Combinational Networks) /secure;
Readings:
http://www.ece.uah.edu/~milenka/cpe626-04F/secure/systemc/cocentric_systemC/tutorial/tutorial.html
� W8
� Oct 18, 2004: SystemC (Modeling of Combinational and Sequential Circuits) see /secure
� Oct 20 2004: SystemC (Examples, Testbenches) see /secure
� W9
� Oct 25, 2004: Midterm Exam
� Oct 27, 2004: SystemC (Testbenches, Memory)
� W10
� Nov 1, 2004: In-class presentation: FPGA Structures
� Nov 3, 2004: On Writing papers and preparing presentations (see /secure)
� W11
� Nov 8, 2004: ARM: Instruction set and Organization (see /secure)
� Nov 10, 2004: Designing Datapath Building Blocks; Adders (/secure)
� W12
� Nov 15, 2004: Adders, Multipliers (/secure)
� Nov 17, 2004: (/secure)
� W13
� Nov 22, 2004: Review, Future Trends
� Nov 24, 2004 No Classes.
� W14
� Nov 29, 2004: On Realtime Power Measurements
� Dec 1, 2004: Class Presentation (Alex Burns)
� W15
� Dec 6, 2004: Class Presentations 1) Brian & Chris 2) Hussein Al-Zoubi
� Dec 8, 2004 (last class) Class Presentations 1) Kevin Welsch, Marcus Oni; 2) Danny Long
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Homeworks
- Hw1 (issued: 09/08/2004, due: 09/22/2004)
- Hw2 (issued: 09/29/2004, due: 10/12/2004)
- Hw3 (issued: xx/xx/xx, due: xx/xx/xx)
- Hw4 (issued: xx/xx/xx, due: xx/xx/xx)
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Links
� LaCASA: http://www.ece.uah.edu/~lacasa
� WWW Computer Architecture Home Page: http://www.cs.wisc.edu/~arch/www
� Oral Presentation Advice, by Mark D. Hill
� VHDL
o RASSP Support Page for VHDL: http://www.eda.org/rassp/vhdl/
o Hamburg VHDL Archive: http://tech-www.informatik.uni-hamburg.de/vhdl/
o
� IP Cores
o OpenCores.org: http://www.opencores.org/
o Xilinx IP center: www.xilinx.com/ipcenter/
�
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